Cadence
HiPer SoC Lab announces its first SoC platform designed in close collaboration with Cadence, imec and TSMC
By Dr. Tsvika Ben-Porat
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October 26, 2017
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Comments Off on HiPer SoC Lab announces its first SoC platform designed in close collaboration with Cadence, imec and TSMC
Ramat Gan, Israel, The HiPer Consortium SoC Lab of Bar Ilan University, together with its partners, Cadence Design Systems, imec and TSMC, announced today the successful bring-up and validation of its 28nm system-on-chip (SoC) platform, which provides a foundation for collaborative innovation in advanced process nodes. The SoC Lab, funded by the Magnet Program of the Israel Innovation Authority in the framework of…
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